In this video you will find detailed description how to recover data from SSD drives based on Indilinx Barefoot (IDX100XXXX) controllers. Also, this video contain information about functionality, options and different features which are presented in this Active Utility.
Supported Models:
One of the most popular problem in modern tasks – try to find correct XOR for data re encryption. About XOR you always can read more information by the following link.
In this article you will find the way, how to change page size and fit it for XOR, which was not possible to detected before.
As we all know, controller which is used the physical space of memory chip, sometimes does not use a part of the area, where SA should be replaced. In this situation, controller just put FF-FF-FF bytes instead service structures. After dump reading, we can cut this FF-FF-FF values, and reduce the page size, for example, from 8640 bytes to 8576 bytes and probably find XOR which was available only for 8576 byte page size before.
EXAMPLE:
We get the case with controller SM3257EN and with 1 physical flash chip
After chip reading, we can launch ECC Autodetection, and try to find ECC description. If our case does not have any inserts, we should see the following record in log:
XOR – is some kind of special operation which allows controller encrypt data with special pattern. So, basically we can call it “soft encryption”, because this XOR can change user data and does not allow us to find any headers in dump.
All modern controllers which are situated in Flash drives use XOR. It help to reduce wear effect on small NAND Flash cell’s and improve the quality of reading data from memory chips (with less number of bit errors during writing and reading data).
The first thing that user should do before he will try to find any headers in dump – eliminate XOR. Exist several rules for XOR detection and elimination.
When you read memory chip in PC-3000 Flash reader its raw image is stored into “dmp” file (you can find this file in folder of task) sector by sector.
Reared creates the dump of chip in accordance with memory chip parameters (reading algorithm, page size, capacity, etc).
As far as we know all readers/programmers read chips by this algorithm.
Hence you can create task in PC-3000 Flash using dumps read via other readers.
For a long time, data recovery from SSD drives was very complicated and take too much time. For one SSD case engineer should waste around 1 week of his time, trying to detect the correct order of memory chips, eliminate all controller preparations and finally, build image with user data.
For example, in this solution from GSC, you can see – how may joining preparation contain a common Intel SSD drive:
This video will describe the procedure of unsoldering memory chips in BGA/LGA-52 package.
Don’t forget to turn on the English subtitles and annotations! Current Video does not contain any sound! Only subtitles in Russian and in English! 
PC-3000 Flash allows users to change or manipulate the order of already read memory dumps from the NAND memory chips. This option is found under “Transform Graph” section once the reading process of all memory chips is completed. However, there is a way to detect the correct order of memory chips at the beginning of the NAND reading process.
Starting from PC-3000 Flash SSD Edition ver. 6.2.1 new function of readout has been added. This feature allows to apply auto verification + ECC and reread bad pages from memory chips with better quality result. Modern memory chips contain a lot of bit errors, and sometimes final read result is not enough good for further recovery, even if we make ECC correction of launch Autoverification during chip read. In such cases we recommend to our users launch this feature every time when the power of ECC is not enough for data correction. Here is the guide how to launch it.
All modern memory chips have a very low quality. It means that each new generation of memory chips have much more bad cells than previous generation. It happens because technological process which is used during memory chip production become smaller and smaller (firstly it was 65 nm (nanometres), than become 45nm, 32nm, 25nm, and now – 20nm and 18nm, 14nm), the cells inside chips become smaller and smaller, and the layer of isolation between cells become thinner. At the same time, developers could replaced bigger count of cells at the same area using the latest available techprocess, that’s why memory chips become cheaper and their capacity is grown up every year (but their quality become worse and worse).
As we all know, most of modern TLC chips, produced by such companies as Toshiba, have problems with it’s reading. Sometimes, after dump reading is finished, we can see that data is seriously corrupted with bit errors, and unfortunately for their correction, ECC codes are not effective. Such memory chips contain too many errors, and the power of ECC codes is not enough for their correction. Even if we will try to use readout for data improvement, a lot of pages would be still damaged and not fixed.
